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Part 1 of this feature dealt with the burgeoning growth in automotive electronics applications, which strains current electronics architectures, and how FPGAs offer control, processing, and cost solutions.
Like an FPGA, a CPU should be sufficiently flexible enough to provide greater design latitude, depth, and breadth for automotive electronics applications. For example, the Nios II embedded processor (below) does not reside on a rigid, unchangeable, pre-specified silicon device like conventional microcontrollers (μCs). Instead, it is automatically generated, based on the specifications defined by the system designer with the aid of available tools.
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The embedded processor is then loaded into the FPGA with the remainder of the logic required for the entire circuit. Thus, the processor core can be parameterized based on the requirements for the specific auto electronics application.
The embedded processor is built on a standard reduced instruction set computing (RISC) architecture with separate address and data buses, each 32-bits wide. Both operate via separate caches and can be continued separately into the bus system. The designer determines whether or not to use separate memory for code and data or keep both in shared memory.
Many of the functional units that every processor contains are present in this embedded processor. But the settings determine their character. For example, the hardware multiplier, barrel shifter, and hardware divider can be selected as options. The same is true for instruction and data cache, which can be varied in size or completely excluded.
CISC vs. RISC
Unlike the complex instruction set computing (CISC) architecture used in some conventional μCs, this RISC-based embedded processor also complies with the higher throughput requirements of compute-intensive algorithms used in advanced auto electronics systems. What sets RISC apart from CISC is the ability to execute an instruction in a single clock cycle and the fact that RISC-based systems do not use microcode to decode instructions.
A line of software in a CISC machine generates an opcode. This opcode is basically an address for a microcode memory or control store, which points to a certain string of control bits applied to the execution unit. These bits include many control signals to ensure that the execution unit performs the desired function.
On the other hand, a RISC processor does not have a microcode memory. Thus, the opcode, which is generated in software, is applied directly to a larger array of combinational control logic to generate all the appropriate signals to operate the execution unit. This is a more complex design, resulting in a smaller silicon area since there is no microcode memory, but considerably faster operating speed.
Telematics/entertainment systems—features and challenges
Such a soft core embedded RISC processor can be used to implement a controller module in telematics/entertainment systems, for example, as shown below.
The FPGA is ideal for implementing major functions and many of the interfacing applications found in telematics systems, which are used to control auto electronic systems and to efficiently display information about these systems to the driver and passengers. Data displayed can include information from navigation and global positioning systems (GPS) and maps, entertainment content, mobile phones, and in some regions, road-tolling systems.
Designers developing telematics systems face the challenge of anticipating what specific features to build in and how those systems can be customized regionally and updated over time. And automakers must also assure that their products interface with a wide range of equipment, including after-market devices that customers can install.
FPGAs resolve most of these issues because auto OEMs can develop flexible telematics systems and customize them to meet specific customer needs. The programmable logic in FPGAs can provide upgradeable interfacing on a large or small scale within interfacing buses or as a complete bus-interfacing unit. They can also enable interfacing between various protocols used by different ASSPs (application specific standard products).
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