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Expectations are set high for the automotive industry. Drivers expect constantly improving performance while governments and standards bodies demand environmental compliance and safety enhancements. All of these factors combine to drive greater performance requirements of cars and in turn on the many functional electronic modules within the car.
The improvement in the capability of an electronic module often falls directly onto the microcontroller that provides the logical functionality of the unit. Embedded designers find that, for example, while last year's application may have been sufficiently implemented with 128k of program memory and four active, real time events, this year's product needs twice as much memory and three times as many events. Along with this increase in sophistication comes a greater complexity as modules have a greater need to communicate information among themselves. Interestingly, the nature of the information to be processed tends to be very stable " much of the information required within the car is of limited size, typically less than 16 bits.
The Price of Performance
Engineers faced with this increasing load have a natural tendency to look for a more powerful processor to do the job. The traditional trends in processor performance have been to increase both speed and data size, so an 8-bit processor will move from 8 to 16 MHz or a 16-bit device will become a 32-bit device. Unfortunately, both of these trends come at some cost"faster devices tend to consume more power and be less EMC friendly. Larger bit widths lose the benefits of previous software investments and lead to increased redundancy (i.e. using 32-bit registers to process 4-bit data).
Recognizing this trend and performance dilemma, Freescale Semiconductor (Glasgow, Scotland) has adopted an approach for its new S12X architecture (www.freescale.com/files/abstract/misc/S12XHOME.htm?tid=tAhb) that balances increased performance against backwards compatibility. This new design emphasizes increased processor performance in the area that needs it, namely the real-time processing of information.
Co-Processing
Classical approaches to improve real-time performance usually involve the addition of a simple module that handles events as they happen, allowing the software to postpone processing the event until a more convenient time. The Dynamic Memory Access (DMA) hardware approach is well understood and a commonly used solution. DMA directly transfers data between memory and peripheral modules without CPU intervention. The CPU is thus relieved from executing time consuming interrupt handlers. Ultimately though, its impact is simply to delay the inevitable because the processor must deal with the event later. How much later is a guide to the real-time performance of the processor.
The S12X takes a different tack by recognizing that there are events that require immediate processing. For example, in a gateway module the time taken to receive and retransmit data has an impact on the overall responsiveness of the vehicle. What is really needed is a second, programmable processor whose purpose is to deal with real-time events as they happen. This approach allows the main processor to continue with its other activities. On the S12X family this co-processor is called the XGate.
The XGate is implemented as a 16-bit RISC engine that is optimized for real-time operation. It is optimized by including instructions that are best suited for real-time operation. Instructions not suited to this kind of operation are only included if otherwise necessary. XGate is fully programmable in C and has access to all of the peripheral and memory blocks in the microcontroller.
Gateways and Dashboards
There are several benefits of such an approach within embedded automotive modules. For example, an automotive gateway operates like a logistics hub for a transport company. It receives packets from a single source and separates them for distribution to different receivers. So a gateway will typically receive a message on one CAN bus, split the contents of the message up into its component parts, and pass these parts out on different CAN busses as part of different messages. By programming the XGate to handle this entire task, the time between reception and transmission of the message is reduced because the main processor no longer has to finish its current activity before dealing with the message.
Freescale developers estimate that a CAN message can be broken down, distributed, and retransmitted in approximately 30s"a four- to five-time improvement over conventional 16-bit systems. When using all of its five CAN buses, an S12X MC9S12XDP512 microcontroller can sustain a typical performance of more than 40,000 messages per second. The main processor in such a system is free to perform network management activities or perhaps some other application dependent activity.
Another high real-time performance requirement is seen in a dashboard where multiple sensor data must be presented on a range of displays for the driver.
The XGate can be programmed to constantly update the information shown to the driver while handling the incoming sensor data. In this case the constant manipulation of the incoming data is best suited to the main processor which is freed from the constant interruption of updating the visual display information. The net effect is that distracting display-screen glitches are avoided while the latest information is always available to the driver. Typical XGate loads in this case are less than 10% of its capacity.
Recycling
By maintaining backwards compatibility with the widely deployed S12 family, the S12X allows significant reuse of previous software and hardware tools and expertise investments. The addition of the XGate to the processor allows the burgeoning real-time requirements of modern systems to be accommodated. This combined approach of compatibility and focused performance satisfies the demands of carmakers and users for better performing but more cost effective automobiles.
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